1. Field of the Invention
Embodiments relate to differential drivers and methods. More particularly, embodiments relate to a differential driver and method able to adjust a slew rate of an output signal independent of variations in a process voltage temperature (PVT) and of a maximum operating frequency.
2. Description of the Related Art
FIG. 1 illustrates a circuit diagram of a general differential driver 100. The general differential driver 100 shown in FIG. 1 may include a mirrored structure coupled thereto. Thus, the fan-out is two, but FIG. 1 illustrates just the left-side differential amplifier 100 for ease of explanation.
Referring to FIG. 1, the differential driver 100 may include a main drive circuit 101, a slew rate controller 102, a terminal resistor (or pull-up resistor) Rt, and a current source Cs. The main driver 101 may include three NMOS transistors (hereinafter, ‘transistors’) M4, M5, and M6, which may be turned on or off in response to a voltage level of an input signal IN. Since the differential driver 100 includes only a single current source CS, the transistors M4˜M6 may have a same gate width. The slew rate controller 102 may include two resistors R1 and R2 to vary operation speed between the transistors M4˜M6, a transmission gate TG11 turned on or off by control nodes C1 and C1b, and a transmission gate TG12 turned on or off by control nodes C2 and C2b. 
FIG. 2 illustrates a graph showing slew rates of an output signal generated by the differential driver 100 of FIG. 1.
Referring to FIGS. 1 and 2, in the differential driver 100, the transistors M4˜M6 may be simultaneously turned on when the input signal IN is high and the transmission gates TG11 and TG12 are all turned on by the control nodes C1, C1b, C2, and C2b. If the transistors M4˜M6 are simultaneously turned, an unexpectedly large amount of current may flow through the differential driver 100, raising a slew rate of the output signal OUT. A resultant waveform 10, shown in FIG. 2, has a large slope, thus a slew rate of the output signal OUT from the differential driver 100 is high. As the slew rate of the output signal OUT increases, an effect of electromagnetic interference (EMI) increases, thereby increasing noise of the output signal OUT.
When the input signal IN is high and the transmission gates TG11 and TG12 are turned off by the control nodes C1, C1b, C2, and C2b, the transistor M5 may turn on later than the transistor M4 due to delay through the gate capacitance thereof and the resistor R1. Further, the transistor M6 may turn on later than the transistor M5 due to delay through gate capacitance of thereof and the resistor R2. When the transistors are turned on in sequence, an amount of current flowing through the differential driver 100 is gradually increased, lowering an output slew rate. A resultant waveform 20 shown in FIG. 2 has a smaller slope than the waveform 10, so a slew rate of the output signal OUT of the differential driver 100 is lowered, decreasing an effect of EMI and reducing noise of the output signal OUT.
During operation of the differential driver 100, parasitic capacitances and resistances are inevitably generated. The parasitic capacitances and resistances generated in the differential driver 100 may not be a concern at low operating frequencies, but may cause problems when the differential driver 100 is operating at high frequencies due to RC resonance. Such RC resonance arising from the parasitic capacitances and resistances may vary turn on times of the transistors M5 and M6, thus varying the slew rate of the output signal OUT. Thus, there is a limit on the maximum operating frequency.
Further variability in the slew rate may arise from the resistors used. A resistor is usually accompanied by an error rate variable due to its manufacturing process. For example, a negative resistor of 1 kΩ may have an error rate of ±20%. The resistance of the resistor may vary within the range of its error rate in accordance with variations of PVT. If the resistors R1 and R2 for delaying turn on of the transistors M5 and M6 vary in resistance due to PVT, the transistors M5 and M6 may operate with delays different from normal delays as preliminarily designed.
In FIG. 2, a dotted waveform A illustrates deviation of the slew rate of the output signal affected by the aforementioned problems from the waveform 10 and a dotted waveform B illustrates deviation of the slew rate of the output signal affected by the aforementioned problems from the waveform 20. As a result, the differential driver 100 may provide a variable and/or undesired slew rate of the output signal.